There are a couple of interesting things here. The first is the use of output devices used on this board - they are "logic Level FETs" - 20N10L - when I went to grab the data sheet this is what I found:
"STP20N10L - OLD PRODUCT: NOT SUITABLE FOR NEW DESIGN-IN ST Microelectronics"
So this confirms my idea of steering clear of some of these 'new fangled' parts - they go out of fashion way too quickly and then you have a useless board????
The 47K resistors to ground (looks like 47K in the bottom pic) are used to ensure the LLFs are held in the OFF state as they are driven by a 5V logic rail - IE directly from the 74240.
74240 are '3 state output devices' BUT they are NOT 'open collector' outputs that would require a tie high resistor or load. The outputs are configured by the designer to be one of the 'tri' states as she needs it - either on the fly or certainly at boot.
The board should work OK as is and I suspect the 'added' 47K resistors were needed because as the 74240 was being initialised to force its tri-state outputs low (at boot probably) these resistors ensure the driver transistors stay OFF and not fire the solenoids. This reminds me so much of the RUBBISH Gottlieb SS design - where all solenoids fire when you power up the machine..….design with no thought!
If I ever design something this crap please come and burn my workshop down!
Thanks mike
But the 2 mosfets you see with the resistors are not driven by the 74240, they are directly driven via J4 on the solenoid board which is connected to the the mpu board. all the other fets are driven by the 74240.
on the original bally driver board all inputs have pull up resistors (on both momentary and continuous circuits) when in this state all the transistors are off.
If you want to turn on any of the continuous transistors you must pull the corresponding pin on J4 low.
the signal is then inverted to +5 volts which goes to the base of the transistor which in turn turns on the transistor and energises the solenoid.
Now on the rotten dog board i have when the 3 fets are pulled low when the mpu tries to energise these 3 fets by pulling the missing inverting buffer low nothing will happen.
all the other gates on the other fets are inverted.
they have fixed this with the later bps022 board and have all the gates inverted via a 74240.
on my test rig that i use to test the continuous solenoids on the original bally board works by pulling pins 8 to 11 low to energise the transistors.
this works fine for the fet on the rotten board which is inverted via the 74240 but does nothing for the other fets connected to pins 9,10, and 11 on j4.
